1. Field of Invention
The present invention relates to a semiconductor fabrication method, and more particularly to a patterning method.
2. Description of Related Art
The demand for a higher resolution in a photolithography process goes up as dimensions of semiconductor devices continue to shrink. Generally, the resolution increases as the thickness of a photoresist layer decreases. The photoresist layer, however, must have a thickness sufficient to resist etching (i.e. anti-etching ability). Hence, the miniaturization of devices can hardly be achieved by reducing the thickness of the photoresist layer directly.
Further, the incident light, which is through the photoresist layer and reflected from the substrate, interferes with a portion thereof, so as to cause a non-uniform exposure to the photoresist layer and result in a variation of critical dimensions. For example, the incident light and the reflected light combine in the photoresist layer to create standing waves and cause distortions in the patterns of the photoresist layer; thus, the undesired change of a line width, such as necking or bridging and even photoresist collapse occurs.
Due to the above-mentioned problems, it is rather difficult when fabricating a metal line with a line width less than 80 nm. Therefore, the technology of enhancing the resolution without losing any anti-etching ability, and avoiding the reflection effect in the lithography process has been diligently pursued in the semiconductor industry.